RISC-V Symposium at MIT (12 and 13th of July 2016)

RISC-V Symposium at MIT (12 and 13th of July 2016)

RISC-V is a modern instruction set architecture defined by a small group of engineers and researchers from Berkeley university and MIT. Started as an educative project to learn chip design, the architecture is rapidly evolving with the support of a structured non profit foundation which aims to keep RISC-V open and delivering advanced features. Even if  implementations are still very rares, interest is growing up in a world where server market is dominated by a single chip vendor (Intel), and where ARM is struggling to deliver and apply a business model which is not adapted to Open Hardware. First linux kernel implementations are on there way, ISA simulators are running and even able to boot linux. Our believing is that it might be interesting for you to keep an eye on this new architecture, and why not joining the community ?

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